I've been thinking about implementing a RISC-V core as a project, but I haven't done any logic design since college (basic 5-stage pipelined RISC). What cheap FPGAs are available that would handle this? Something that works with free software tools would be a bonus.
RISC-V thread
The fuck do you mean? The ISA has been completely free & open from the start. Nobody promised you free hardware, if that's what you're talking about.
That's exactly what its fanboys pretend happened though. An open ISA isn't much, again see MIPS.
Year of the MIPS desktop when?
Consider RISC-V another escape hatch if x86 goes full retard, runs into unsolvable problems or Intel/AMD begins serious market abuse. Lowering competitor price is also a reason. Open development model is there to safeguard against intellectual property issues.
So no, right now there is no other reason to care about RISC-V except freetardism but still it's a good move in bigger scheme of global market economy especially in business dominated by only a handful of corporations.
1996
Some criticism of RISC-V from a former execution core verification engineer at Arm Holdings. It is unclear whether this was just a personal document or a published internal note at Arm.
gist.github.com
This "Engineer".
go away rustfag
I literally never used Rust, retard.